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TRON project 1988 : open-architecture computer systems /

The proceedings of the fifth TRON symposium presented here cover all aspects of the TRON project, which aims at establishing the new computer architecture for the 1990s. The papers review the current status of development of TRON as well as its various subprojects and examine future trends. ITRON, B...

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Bibliographic Details
Corporate Authors: TRON Project Symposium Tokyo, Japan, SpringerLink (Online service)
Other Authors: Sakamura, Ken, 1951-
Format: Conference Proceeding eBook
Language:English
Published: Tokyo ; New York : Springer-Verlag, [1988]
Subjects:
Computer architecture > Congresses.
Real-time data processing > Congresses.
GMICRO.
tronchip.
architecture microprocesseur.
microprocesseur 32 bits.
CTRON.
BTRON.
ITRON.
Tron.
Computer architecture.
Real-time data processing.
Electronic books.
Conference proceedings.
Online Access:Connect to the full text of this electronic book
Table of Contents:
  • 1: TRON System Architecture
  • TRON Universal Language System
  • Design of MTRON: Construction of HFDS
  • 2: ITRON
  • HI8:A Realtime Operating System with -ITRON Specification for the H8/500
  • MR7700: An Implementation of -ITRON Specification on 16-bit Single-Chip Microcontroller
  • An Integrated Embedded Systems Software Development Environment for ITRON
  • 3: BTRON
  • TACL: TRON Application Control-Flow Language
  • Natural Language Translation Services in BTRON
  • A Study on Video Manager of the BTRON Specification
  • The Type Mechanism of the TIPE/L Programming Language
  • 4: CTRON
  • Perspectives on CTRON
  • CTRON Reference Model
  • Design of the CTRON Communication Control Interface
  • Design of CTRON Execution Control Interface
  • Enhancement of the CTRON Kernel Interface
  • An Implementation of the CTRON Basic OS
  • An Implementation of CTRON Basic OS on a Lap-Top Workstation
  • 5: TRONCHIP
  • Architectural Features of OKI 32-Bit Microprocessor
  • Design Considerations of the Matsushita 32-Bit Microprocessor for Real-Memory Systems
  • An Examination of the Fundamental Configuration of the Microprocessor for Virtual Memory Systems
  • Implementation and Evaluation of the TRONCHIP Specification for the TX1
  • A Floating Point Processing Unit for the Gmicro CPU
  • High Performance Bus Interface of Gmicro/300
  • A 40 MB/s 32-Bit DMA Controller with 3411 Product Terms PLA
  • Development of a C Compiler for Gmicro Micro Processor Based on TRON Architecture
  • Development Support System for TX Series
  • An Integrated Software Development Toolkit for the GMICRO/200
  • List of Contributors
  • Keywords Index.