A guide to VHDL /
A Guide to VHDL is intended for the working engineer who needs to develop, document, simulate and synthesize a design using the VHDL language. It is for system and chip designers who are working with VHDL CAD tools, and who have some experience programming in Fortran, Pascal, or C and have used a lo...
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| Format: | eBook |
| Language: | English |
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Boston :
Kluwer Academic Publishers,
[1992]
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| Online Access: | Connect to the full text of this electronic book |
| Summary: | A Guide to VHDL is intended for the working engineer who needs to develop, document, simulate and synthesize a design using the VHDL language. It is for system and chip designers who are working with VHDL CAD tools, and who have some experience programming in Fortran, Pascal, or C and have used a logic simulator. A Guide to VHDL includes a number of paper exercises and computer lab experiments. If a compiler/simulator is available to the reader, then the lab exercises invluded in the chapters can be run to reinforce the learning experience. For practical purposes, this book keeps simulator-specific text to a minimum, but does use the Synopsys VHDL Simulator command language in a few cases. A Guide to VHDL can be used as a primer, since its contents are appropriate for an introductory course in VHDL. |
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| Item Description: | Electronic resource. |
| Physical Description: | 1 online resource (1 volume (various pagings)) : illustrations |
| Format: | Master and use copy. Digital master created according to Benchmark for Faithful Digital Reproductions of Monographs and Serials, Version 1. Digital Library Federation, December 2002. |
| Bibliography: | Includes bibliographical references and index. |
| ISBN: | 9781475721140 (electronic bk.) 1475721145 (electronic bk.) |