rdf-syntax-grammar
mods:
  schema location: http://www.loc.gov/mods/v3 http://www.loc.gov/standards/mods/v3/mods-3-2.xsd
  title info:
    title: GPU-based Parallel Computing Models and Implementations for Two-party Privacy-preserving Protocols
  name:
    name part: Pu, Shi
    role:
      role term: creator
    role:
      role term: author.
  name:
    name part: Liu, Jyh-Charn
    role:
      role term: thesis advisor.
  name:
    name part: Texas A & M University
    role:
      role term: degree granting institution.
  type of resource: text
  genre: bibliography
  origin info:
    place:
      place term: txu
    date issued: 2014
    issuance: monographic
  language:
    language term: eng
  physical description:
    form: remote
    extent: 1 online resource.
  abstract: In (two-party) privacy-preserving-based applications, two users use encrypted inputs to compute a function without giving out plaintext of their input values. Privacy-preserving computing algorithms have to utilize a large amount of computing resources to handle the encryption-decryption operations. In this dissertation, we study optimal utilization of computing resources on the graphic processor unit (GPU) architecture for privacy-preserving protocols based on secure function evaluation (SFE) and the Elliptic Curve Cryptographic (ECC) and related algorithms. A number of privacy-preserving protocols are implemented, including private set intersection (PSI), secret handshaking (SH), secure Edit distance (ED) and Smith-Waterman (SW) problems. PSI is chosen to represent ECC point multiplication related computations, SH for bilinear pairing, and the last two for SFE-based dynamic programming (DP) problems. They represent different types of computations, so that in-depth understanding of the benefits and limitations of the GPU architecture for privacy preserving protocols is gained. For SFE-based ED and SW problems, a wavefront parallel computing model on the CPU-GPU architecture under the semi-honest security model is proposed. Low level parallelization techniques for GPU-based gate (de-)garbler, synchronized parallel memory access, pipelining, and general GPU resource mapping policies are developed. This dissertation shows that the GPU architecture can be fully utilized to speed up SFE-based ED and SW algorithms, which are constructed with billions of garbled gates, on a contemporary GPU card GTX-680, with very little waste of processing cycles or memory space. For PSI and SH protocols and underlying ECC algorithms, the analysis in this research shows that the conventional Montgomery-based number system is more friendly to the GPU architecture than the Residue Number System (RNS) is. Analysis on experiment results further shows that the lazy reduction in higher extensi…
  note: by Shi Pu.
  note: "Major Subject: Computer Science"
  note: Includes vita.
  note: Doctor of Philosophy Texas A & M University 2013 http://hdl.handle.net/1969.1/151845
  note: Includes bibliographical references.
  note: Text (Dissertation)
  subject:
    topic: Major Computer Science
  subject:
    topic: Privacy-preserving computing
  subject:
    topic: Secure function evaluation
  subject:
    topic: Dynamic programming
  subject:
    topic: Elliptic Curve Cryptography
  subject:
    topic: GPU
  identifier: http://hdl.handle.net/1969.1/151845
  record info:
    record content source: TXA
    record creation date: 140617
    record change date: 20151206101758.0
    record identifier: in00003479070
    language of cataloging:
      language term: eng