rdf-syntax-grammar
mods:
  schema location: http://www.loc.gov/mods/v3 http://www.loc.gov/standards/mods/v3/mods-3-2.xsd
  title info:
    non sort: A
    title: low total harmonic distortion sinusoidal oscillator based on digital harmonic cancellation technique
  name:
    name part: Yan, Jun.
    role:
      role term: creator
  name:
    name part: Sánchez-Sinencio, Edgar
    role:
      role term: thesis advisor.
  type of resource: text
  genre: bibliography
  origin info:
    place:
      place term: txu
    date issued: 2012
    issuance: monographic
  language:
    language term: eng
  physical description:
    form: remote
    extent: 1 online resource.
  abstract: Sinusoidal oscillator is intensively used in many applications, such as built-in-self-testing and ADC characterization. An innovative medical application for skin cancer detection employed a technology named bio-impedance spectroscopy, which also requires highly linear sinusoidal-wave as the reference clock. Moreover, the generated sinusoidal signals should be tunable within the frequency range from 10kHz to 10MHz, and quadrature outputs are demanded for coherent demodulation within the system. A design methodology of sinusoidal oscillator named digital-harmonic-cancellation (DHC) technique is presented. DHC technique is realized by summing up a set of square-wave signals with different phase shifts and different summing coefficient to cancel unwanted harmonics. With a general survey of literature, some sinusoidal oscillators based on DHC technique are reviewed and categorized. Also, the mathematical algorithm behind the technique is explained, and non-ideality effect is analyzed based on mathematical calculation. The prototype is fabricated in OnSemi 0.5um CMOS technology. The experimental results of this work show that it can achieve HD2 is -59.74dB and HD3 is -60dB at 0.9MHz, and the frequency is tunable over 0.1MHz to 0.9MHz. The chip consumes area of 0.76mm2, and power consumption at 0.9MHz is 2.98mW. Another design in IBM 0.18um technology is still in the phase of design. The preliminary simulation results show that the 0.18um design can realize total harmonic distortion of -72dB at 10MHz with the power consumption of 0.4mW. The new design is very competitive with state-of-art, which will be finished with layout, submitted for fabrication and measured later.
  note: by Jun Yan.
  note: "Major Subject: Electrical Engineering"
  note: Electronic resource.
  note: Master of Science Texas A&M University 2012 http://hdl.handle.net/1969.1/ETD-TAMU-2012-05-11204
  note: Includes bibliographical references.
  note: Text (Thesis)
  subject:
    topic: Major Electrical Engineering
  subject:
    topic: digital harmonic cancellation
  subject:
    topic: sinusoidal oscillator
  subject:
    topic: low THD
  identifier: http://hdl.handle.net/1969.1/ETD-TAMU-2012-05-11204
  record info:
    record content source: TXA
    record creation date: 121010
    record change date: 20150922123239.0
    record identifier: in00002761238