A 3rd-order continuous-time low-pass sigma-delta ([sigma][delta]) analog-to-digital converter for wideband applications /
| Main Author: | |
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| Format: | Thesis eBook |
| Language: | English |
| Published: |
[College Station, Tex.] :
[Texas A&M University],
[2011]
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| Subjects: | |
| Online Access: | Link to OAK Trust copy |
| Abstract: | This thesis presents the design of a 20 MHz bandwidth 3rd-order continuous-time low-pass sigma-delta analog-to-digital converter with low-noise and low-power consumption using TSMC 0.18 [mu]m CMOS technology. The bandwidth of the system is selected to be able to accommodate WiMAX and other wireless network standards. A 3rd-order filter with feed-forward architecture is selected to achieve low-power consumption as well as less complexity. The system uses 3-bit flash quantizer to provide fast data conversion. The current-steering DAC not only achieves low-power and less current sensitivity, but also it helps directly inject the feedback signal without additional circuitries. In order to avoid degradation of the overall performance, cross-coupled transistors are adopted to reduce the current glitches. The proposed system achieves a peak SNDR of 65.9 dB in 20 MHz bandwidth, and consumes 31.735 mW from a 1.8 V supply. The entire circuit is driven by a sampling rate at 500 MHz. The measured in-band IM3 of this thesis is -69 dB with 600 mVp-p two tone signal peak-to-peak voltage. |
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| Item Description: | "Major Subject: Electrical Engineering" Title from author supplied metadata (automated record created 2011-08-09 15:12:36). Electronic resource. |
| Physical Description: | 1 online resource. |
| Bibliography: | Includes bibliographical references. |