Three-dimensional integrated circuit design /

With vastly increased complexity and functionality in the "nanometer era" (i.e. hundreds of millions of transistors on one chip), increasing the performance of integrated circuits has become a challenging task. This is due primarily to the inevitable increase in the distance among circuit...

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Bibliographic Details
Main Author:	Pavlidis, Vasilis F., 1976-
Corporate Author:	ScienceDirect (Online service)
Other Authors:	Friedman, Eby G.
Format:	eBook
Language:	English
Published:	Amsterdam ; Boston : Morgan Kaufmann, [2009]
Series:	Morgan Kaufmann series in systems on silicon.
Subjects:	Integrated circuits > Design and construction. Electronic books.
Online Access:	Connect to the full text of this electronic book

Table of Contents:

Chapter 1. Introduction
Chapter 2. Manufacturing of 3-D Packaged Systems
Chapter 3. 3-D Integrated Circuit Fabrication Technologies
Chapter 4. Interconnect Prediction Models
Chapter 5. Physical Design Techniques for 3-D ICs
Chapter 6. Thermal Management Techniques
Chapter 7. Timing Optimization for Two-Terminal Interconnects
Chapter 8. Timing Optimization for Multi-Terminal Interconnects
Appendix A: Enumeration of Gate Pairs in a 3-D IC
Appendix B: Formal Proof of Optimum Single Via Placement
Appendix C: Proof of the Two-Terminal Via Placement Heuristic
Appendix D: Proof of Condition for Via Placement of Multi-Terminal Nets
References.