http://www.loc.gov/mods/v3 http://www.loc.gov/standards/mods/v3/mods-3-2.xsd
gm/ID design methodology, a sizing tool for low-voltage analog CMOS circuits
the semi-empirical and compact model approaches
In title "gm/ID" both the m and D are subscript.
Electronic reproduction. New York : Springer, 2010. Mode of access: World Wide Web. System requirements: Web browser. Title from title screen (viewed on Aug. 9, 2010). Access may be restricted to users at subscribing institutions.
Includes bibliographical references (pages 167-168) and index.
Metal oxide semiconductors, Complementary
Analog circuits and signal processing series