Chang, S., & Choi, S. G. (2010). Empirical timing analysis of CPUs and delay fault tolerant design using partial redundancy. [Texas A&M University].
Chicago Style (17th ed.) CitationChang, Sanghoan, and Seong Gwan Choi. Empirical Timing Analysis of CPUs and Delay Fault Tolerant Design Using Partial Redundancy. [College Station, Tex.]: [Texas A&M University], 2010.
MLA (9th ed.) CitationChang, Sanghoan, and Seong Gwan Choi. Empirical Timing Analysis of CPUs and Delay Fault Tolerant Design Using Partial Redundancy. [Texas A&M University], 2010.
Warning: These citations may not always be 100% accurate.