Akl, C. J. (2008). Cost-effective methods for high-speed nanometer CMOS VLSI design: Interconnect and circuits. Lambert Acadamic Publishing.
Chicago Style (17th ed.) CitationAkl, Charbel J. Cost-effective Methods for High-speed Nanometer CMOS VLSI Design: Interconnect and Circuits. Köln, Germany: Lambert Acadamic Publishing, 2008.
MLA (9th ed.) CitationAkl, Charbel J. Cost-effective Methods for High-speed Nanometer CMOS VLSI Design: Interconnect and Circuits. Lambert Acadamic Publishing, 2008.
Warning: These citations may not always be 100% accurate.