Bergeron, J. (2006). Writing testbenches using System Verilog ([Rev. ed.].). Springer Science+Business Media. https://doi.org/10.1007/0-387-31275-7
Chicago Style (17th ed.) CitationBergeron, Janick. Writing Testbenches Using System Verilog. [Rev. ed.]. New York: Springer Science+Business Media, 2006. https://doi.org/10.1007/0-387-31275-7.
MLA (9th ed.) CitationBergeron, Janick. Writing Testbenches Using System Verilog. [Rev. ed.]. Springer Science+Business Media, 2006. https://doi.org/10.1007/0-387-31275-7.
Warning: These citations may not always be 100% accurate.