APA (7th ed.) Citation

Spear, C. (2006). SystemVerilog for verification: A guide to learning the testbench language features. Springer. https://doi.org/10.1007/b138536

Chicago Style (17th ed.) Citation

Spear, Chris. SystemVerilog for Verification: A Guide to Learning the Testbench Language Features. New York, NY: Springer, 2006. https://doi.org/10.1007/b138536.

MLA (9th ed.) Citation

Spear, Chris. SystemVerilog for Verification: A Guide to Learning the Testbench Language Features. Springer, 2006. https://doi.org/10.1007/b138536.