Bertacco, V. (2006). Scalable hardware verification with symbolic simulation. Springer. https://doi.org/10.1007/0-387-29906-8
Chicago Style (17th ed.) CitationBertacco, Valeria. Scalable Hardware Verification with Symbolic Simulation. New York, NY: Springer, 2006. https://doi.org/10.1007/0-387-29906-8.
MLA (9th ed.) CitationBertacco, Valeria. Scalable Hardware Verification with Symbolic Simulation. Springer, 2006. https://doi.org/10.1007/0-387-29906-8.
Warning: These citations may not always be 100% accurate.