APA (7th ed.) Citation

Gopalakrishnan, P., & Rutenbar, R. A. (2004). Direct transistor-level layout for digital blocks. Kluwer Academic Publishers. https://doi.org/10.1007/b117054

Chicago Style (17th ed.) Citation

Gopalakrishnan, Prakash, and Rob A. Rutenbar. Direct Transistor-level Layout for Digital Blocks. Boston: Kluwer Academic Publishers, 2004. https://doi.org/10.1007/b117054.

MLA (9th ed.) Citation

Gopalakrishnan, Prakash, and Rob A. Rutenbar. Direct Transistor-level Layout for Digital Blocks. Kluwer Academic Publishers, 2004. https://doi.org/10.1007/b117054.