APA (7th ed.) Citation

Sutherland, S., Davidmann, S., & Flake, P. (2006). SystemVerilog for design: A guide to using SystemVerilog for hardware design and modeling (2nd ed.). Springer. https://doi.org/10.1007/0-387-36495-1

Chicago Style (17th ed.) Citation

Sutherland, Stuart, Simon Davidmann, and Peter Flake. SystemVerilog for Design: A Guide to Using SystemVerilog for Hardware Design and Modeling. 2nd ed. New York: Springer, 2006. https://doi.org/10.1007/0-387-36495-1.

MLA (9th ed.) Citation

Sutherland, Stuart, et al. SystemVerilog for Design: A Guide to Using SystemVerilog for Hardware Design and Modeling. 2nd ed. Springer, 2006. https://doi.org/10.1007/0-387-36495-1.