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VLSI test principles and architectures : design for testability /

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This book is a comprehensive guide to new DFT methods that will show the readers how to design a testable and quality product, drive down test cost, improve product quality and yield, and speed up time-to-market and time-to-volume. Most up-to-date coverage of design for testability. Coverage of indu...

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Bibliographic Details
Other Authors: Wang, Laung-Terng, Wu, Cheng-Wen, EE Ph. D., Wen, Xiaoqing
Format: eBook
Language:English
Published: Amsterdam ; Boston : Elsevier Morgan Kaufmann Publishers, [2006]
Series:Morgan Kaufmann series in systems on silicon.
Subjects:
Integrated circuits > Very large scale integration > Testing.
Integrated circuits > Very large scale integration > Design.
Circuits intégrés à très grande échelle > Essais.
Circuits intégrés à très grande échelle > Conception et construction.
Electronic books.
Online Access:Connect to the full text of this electronic book
Table of contents
Publisher description
Table of Contents:
  • Chapter 1 Introduction
  • Chapter 2 Design for Testability
  • Chapter 3 Logic and Fault Simulation
  • Chapter 4 Test Generation
  • Chapter 5 Logic Built-In Self-Test
  • Chapter 6 Test Compression
  • Chapter 7 Logic Diagnosis
  • Chapter 8 Memory Testing and Built-In Self-Test
  • Chapter 9 Memory Diagnosis and Built-In Self-Repair
  • Chapter 10 Boundary Scan and Core-Based Testing
  • Chapter 11 Analog and Mixed-Signal Testing
  • Chapter 12 Test Technology Trends in the Nanometer Age.