rdf-syntax-grammar
mods:
  schema location: http://www.loc.gov/mods/v3 http://www.loc.gov/standards/mods/v3/mods-3-2.xsd
  title info:
    title: VLSI test principles and architectures
    sub title: design for testability
  title info:
    title: Referex
  name:
    name part: Wang, Laung-Terng.
  name:
    name part: Wu, Cheng-Wen
    name part: EE Ph. D
  name:
    name part: Wen, Xiaoqing.
  type of resource: text
  genre: bibliography
  genre: Electronic books.
  origin info:
    place:
      place term: ne
    date issued: 2006
    issuance: monographic
  language:
    language term: eng
  physical description:
    form: electronic
    form: remote
    extent: xxx, 777 pages : illustrations ; 25 cm.
  abstract: This book is a comprehensive guide to new DFT methods that will show the readers how to design a testable and quality product, drive down test cost, improve product quality and yield, and speed up time-to-market and time-to-volume. Most up-to-date coverage of design for testability. Coverage of industry practices commonly found in commercial DFT tools but not discussed in other books. Numerous, practical examples in each chapter illustrating basic VLSI test principles and DFT architectures. Lecture slides and exercise solutions for all chapters are now available. Instructors are also eligible for downloading PPT slide files and MSWORD solutions files from the manual website.
  table of contents: Chapter 1 Introduction -- Chapter 2 Design for Testability -- Chapter 3 Logic and Fault Simulation -- Chapter 4 Test Generation -- Chapter 5 Logic Built-In Self-Test -- Chapter 6 Test Compression -- Chapter 7 Logic Diagnosis -- Chapter 8 Memory Testing and Built-In Self-Test -- Chapter 9 Memory Diagnosis and Built-In Self-Repair -- Chapter 10 Boundary Scan and Core-Based Testing -- Chapter 11 Analog and Mixed-Signal Testing -- Chapter 12 Test Technology Trends in the Nanometer Age.
  note: edited by Laung-Terng Wang, Cheng-Wen Wu, Xiaoqing Wen.
  note: Electronic resource.
  note: Electronic reproduction. Amsterdam : Elsevier Science & Technology, 2007. Mode of access: World Wide Web. System requirements: Web browser. Title from title screen (viewed on Aug. 2, 2007). Access may be restricted to users at subscribing institutions.
  note: Includes bibliographical references and index.
  subject:
    topic: Integrated circuits
    topic: Very large scale integration
    topic: Testing
  subject:
    topic: Integrated circuits
    topic: Very large scale integration
    topic: Design
  subject:
    topic: Circuits intégrés à très grande échelle
    topic: Essais
  subject:
    topic: Circuits intégrés à très grande échelle
    topic: Conception et construction
  classification: TK7874.75 .V587 2006eb
  classification: 621.39/5
  related item:
    identifier: (DLC) 2006006869
    identifier: (OCoLC)64624834
  related item:
    title info:
      title: Morgan Kaufmann series in systems on silicon
  identifier: 9780123705976
  identifier: 0123705975
  identifier: 132281:132389 Elsevier Science & Technology
  identifier: http://proxy.library.tamu.edu/login
  identifier: http://www.loc.gov/catdir/toc/ecip069/2006006869.html
  identifier: http://www.loc.gov/catdir/enhancements/fy0632/2006006869-d.html
  related item:
    location:
      url: http://www.loc.gov/catdir/toc/ecip069/2006006869.html
  related item:
    location:
      url: http://www.loc.gov/catdir/enhancements/fy0632/2006006869-d.html
  record info:
    record content source: OPELS
    record creation date: 070806
    record change date: 20260609193622.6
    record identifier: in00002425446