Design and implementation of a frequency synthesizer for an IEEE 802.15.4/Zigbee transceiver /
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| Other Authors: | , |
| Format: | Thesis eBook |
| Language: | English |
| Published: |
[College Station, Tex.] :
[Texas A&M University],
[2007]
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| Subjects: | |
| Online Access: | Link to OAK Trust copy |
| Abstract: | The frequency synthesizer, which performs the main role of carrier generation for the down-conversion/up-conversion operations, is a key building block in radio transceiver front-ends. The design of a synthesizer for a 2.4 GHz IEEE 802.15.4/Zigbee transceiver forms the core of this work. This thesis provides a step-by-step procedure for the design of a frequency synthesizer in a transceiver environment, from the mapping of standard-specifications to its integrated circuit implementation in a CMOS technology. The results show that careful system level planning leads to high-performance realizations of the synthesizer. A strategy of using different supply voltages to enhance the performance of each building block is discussed. A section is presented on layout and board level issues, especially for radio-frequency systems, and their effect on synthesizer performance. The synthesizer consumes 15.5 mW and meets the specifications of the 2.4 GHz IEEE 802.15.4/Zigbee standard. It is capable of 5 GHz operation with a VCO sensitivity of 135 MHz/V and a tuning range of 700 MHz. It can be seen that the adopted methodology can be used for the design of high-performance frequency synthesizers for any narrow-band wireless standard. |
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| Item Description: | "Major Subject: Electrical Engineering" Title from author supplied metadata (automated record created on Nov. 2, 2007.) Vita. Abstract. Electronic resource. |
| Format: | Mode of access: World Wide Web. System requirements: World Wide Web access and Adobe Acrobat Reader. |
| Bibliography: | Includes bibliographical references. |