Introduction to logic synthesis using Verilog HDL /
| Main Author: | |
|---|---|
| Other Authors: | |
| Format: | eBook |
| Language: | English |
| Published: |
[San Rafael, Calif.] :
Morgan & Claypool Publishers,
[2006]
|
| Edition: | 1st ed. |
| Series: | Synthesis lectures on digital circuits and systems ;
#6. |
| Subjects: | |
| Online Access: | Connect to resource online |
| Physical Description: | vii, 75 pages : illustrations ; 24 cm. Also issued online. |
|---|---|
| ISBN: | 1598291068 (paper) 9781598291063 (paper) |