APA (7th ed.) Citation

Selvarathinam, A. M., & Choi, S. G. (2005). High throughput low power decoder architectures for low density parity check codes. [Texas A&M University].

Chicago Style (17th ed.) Citation

Selvarathinam, Anand Manivannan, and Seong Gwan Choi. High Throughput Low Power Decoder Architectures for Low Density Parity Check Codes. [College Station, Tex.]: [Texas A&M University], 2005.

MLA (9th ed.) Citation

Selvarathinam, Anand Manivannan, and Seong Gwan Choi. High Throughput Low Power Decoder Architectures for Low Density Parity Check Codes. [Texas A&M University], 2005.