rdf-syntax-grammar
mods:
  schema location: http://www.loc.gov/mods/v3 http://www.loc.gov/standards/mods/v3/mods-3-2.xsd
  title info:
    title: Design and implementation of low power multistage amplifiers and high frequency distributed amplifiers
  name:
    name part: Mishra, Chinmaya
    name part: 1981-
    role:
      role term: creator
  name:
    name part: Sánchez-Sinencio, Edgar
    role:
      role term: thesis advisor.
  type of resource: text
  genre: bibliography
  origin info:
    place:
      place term: txu
    date issued: 2005
    issuance: monographic
  language:
    language term: eng
  physical description:
    form: electronic
    form: remote
  abstract: The advancement in integrated circuit (IC) technology has resulted in scaling down of device sizes and supply voltages without proportionally scaling down the threshold voltage of the MOS transistor. This, coupled with the increasing demand for low power, portable, battery-operated electronic devices, like mobile phones, and laptops provides the impetus for further research towards achieving higher integration on chip and low power consumption. High gain, wide bandwidth amplifiers driving large capacitive loads serve as error amplifiers in low-voltage low drop out regulators in portable devices. This demands low power, low area, and frequency-compensated multistage amplifiers capable of driving large capacitive loads. The first part of the research proposes two power and area efficient frequency compensation schemes: Single Miller Capacitor Compensation (SMC) and Single Miller Capacitor Feedforward Compensation (SMFFC), for multistage amplifiers driving large capacitive loads. The designs have been implemented in a 0.5 [mu]m CMOS process. Experimental results show that the SMC and SMFFC amplifiers achieve gain-bandwidth products of 4.6MHz and 9MHz, respectively, when driving a load of 25K[Omega]/120pF. Each amplifier operates from a ±1V supply, dissipates less than 0.42mW of power and occupies less than 0.02mm² of silicon area. The inception of the latest IEEE standard like IEEE 802.16 wireless metropolitan area network (WMAN) for 10 -66 GHz range demands wide band amplifiers operating at high frequencies to serve as front-end circuits (e.g. low noise amplifier) in such receiver architectures. Devices used in cascade (multistage amplifiers) can be used to increase the gain but it is achieved at an expense of bandwidth. Distributing the capacitance associated with the input and the output of the device over a ladder structure (which is periodic), rather than considering it to be lumped can achieve an extension of bandwidth without sacrificing gain. This concept which…
  note: by Chinmaya Mishra.
  note: "Major Subject: Electrical Engineering"
  note: Title from author supplied metadata (automated record created on Nov. , 09:45:50.)
  note: Vita.
  note: Abstract.
  note: Electronic resource.
  note: Mode of access: World Wide Web.
  note: System requirements: World Wide Web access and Adobe Acrobat Reader.
  note: M. S. Texas A&M University 2004.
  note: Includes bibliographical references.
  note: Text (Thesis).
  subject:
    topic: Major electrical engineering
  subject:
    topic: low power
  subject:
    topic: low voltage
  subject:
    topic: distributed amplifier
  subject:
    topic: transmission lines
  subject:
    topic: CMOS
  subject:
    topic: multistage amplifier
  subject:
    topic: frequency compensation
  identifier: http://hdl.handle.net/1969.1/2775
  record info:
    record content source: TXA
    record creation date: 070103
    record change date: 20151104121216.0
    record identifier: in00002206035