rdf-syntax-grammar
mods:
  schema location: http://www.loc.gov/mods/v3 http://www.loc.gov/standards/mods/v3/mods-3-2.xsd
  title info:
    title: SystemVerilog for verification
    sub title: a guide to learning the testbench language features
  name:
    name part: Spear, Chris.
    role:
      role term: creator
  type of resource: text
  genre: bibliography
  origin info:
    place:
      place term: nyu
    date issued: 2006
    issuance: monographic
  language:
    language term: eng
  physical description:
    form: print
    extent: xxxiv, 301 pages : illustrations ; 25 cm.
  note: Chris Spear.
  note: Includes bibliographical references (pages [295]-296) and index.
  subject:
    topic: Verilog (Computer hardware description language)
  subject:
    topic: Integrated circuits
    topic: Verification
  identifier: 0387270361 (hd.bd.)
  record info:
    record content source: OHX
    record creation date: 060825
    record change date: 20151104071929.0
    record identifier: in00002193447