VLSI-SOC, from systems to chips : IFIP TC 10/ WG 10.5 Twelfth International Conference on Very Large Scale Integration of System on Chip (VLSI-SoC 2003), December 1-3, 2003, Darmstadt, Germany /
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| Format: | Conference Proceeding Book |
| Language: | English |
| Published: |
New York :
Springer,
[2006]
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| Series: | International Federation for Information Processing (Series) ;
200. |
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Table of Contents:
- Effect of power optimizations on soft error rate / Vijay Degalahal, R. Ramanarayanan, Narayanan Vijaykrishnan, Y. Xie and M. J. Irwin
- Dynamic models for substrate coupling in mixed-mode systems / Joao M. S. Silva and Luis Miguel Silveira
- HINOC : a hierarchical generic approach for on-chip communication, testing and debugging of SoCs / Thomas Hollstein, Ralf Ludewig, Heiko Zimmer, Christoph Mager, Simon Hohenstern and Manfred Glesner
- Automated conversion of SystemC fixed-point data types / Axel G. Braun, Djones V. Lettnin, Joachim Gerlach and Wolfgang Rosenstiel
- Exploration of sequential depth by evolutionary algorithms / Nicole Drechsler and Rolf Drechsler
- Validation of asynchronous circuit specifications using IF/CADP / Dominique Borrione, Menouer Boubekeur, Laurent Mounier, Marc Renaudin and Antoine Siriani
- On-chip property verification using assertion processors / Jose Augusto M. Nacif, Claudionor Nunes Coelho, Jr., Harry Foster, Flavio Miana de Paula, Edjard Mota, Marcia Roberta Falcao Mota and Antonio Otavio Fernandes
- Run-time FPGA reconfiguration for power-/cost-optimized real-time systems / Jurgen Becker, Michael Hubner and Michael Ullmann
- A switched opamp based 10 bits integrated ADC for ultra low power applications / Giuseppe Bonfini, Andrea S. Brogna, Roberto Saletti, Cristian Garbossa, Luca Colombini, Maurizio Bacci, Stefania Chicca and Franco Bigongiari
- Exploring the capabilities of reconfigurable hardware for OFDM-based WLANs / Thilo Pionteck, Lukusa D. Kabulepa and Manfred Glesner
- Software-based test for non-programmable cores in bus-based system-on-chip architectures / Alexandre M. Amory, Leandro A. Oliveira and Fernando G. Moraes
- Optimizing SoC test resources using dual sequences / Wei Zou, Chris C. N. Chu, Sudhakar M. Reddy and Irith Pomeranz
- A novel full automatic layout generation strategy for static CMOS circuits / Cristiano Lazzari, Cristiano Domingues, Jose Guntzel and Ricardo Reis
- Low power Java processor for embedded applications / Antonio Carlos S. Beck and Luigi Carro
- Impact of gate leakage on efficiency of circuit block switch-off schemes / Stephan Henzler, Philip Teichmann, Markus Koban, Jorg Berthold, Georg Georgakos and Doris Schmitt-Landsiedel
- Evaluation methodology for single electron encoded threshold logic gates / Casper Lageweg, Sorin Cotofana and Stamatis Vassiliadis
- Asynchronous integration of coarse-grained reconfigurable XPP-arrays into pipelined RISC processor datapath / Jurgen Becker, Alexander Thomas and Maik Scheer
- Gray encoded arithmetic operators applied to FFT and FIR dedicated datapaths / Eduardo A. C. da Costa, Jose C. Monteiro and Sergio Bampi
- Stuck-at-fault testability of SPP three-level logic forms / Valentina Ciriani, Anna Bernasconi and Rolf Drechsler.