Writing testbenches using System Verilog /
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| Format: | Book |
| Language: | English |
| Published: |
New York :
Springer Science+Business Media,
[2006]
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| Edition: | [Rev. ed.]. |
| Subjects: |
| Item Description: | This book presents the same concepts as the second edition published with title, Writing testbenches, but uses System Verilog as the sole implementation vehicle. The languages used in the second edition are still available. Includes index. |
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| Physical Description: | xxvi, 412 pages : illustrations ; 25 cm. |
| ISBN: | 0387292217 (hbk.) 0387312757 (e-book) |