rdf-syntax-grammar
mods:
  schema location: http://www.loc.gov/mods/v3 http://www.loc.gov/standards/mods/v3/mods-3-2.xsd
  title info:
    title: Advanced digital logic design
    sub title: using Verilog, state machines, and synthesis for FPGAs
  name:
    name part: Lee, Sunggu.
    role:
      role term: creator
  type of resource: text
  origin info:
    place:
      place term: onc
    date issued: 2006
    issuance: monographic
  language:
    language term: eng
  physical description:
    form: print
    extent: xvii, 462 pages : illustrations ; 24 cm.
  note: Sunggu Lee.
  note: Includes index.
  subject:
    topic: Logic design
    topic: Data processing
  subject:
    topic: Digital electronics
  subject:
    topic: Verilog (Computer hardware description language)
  subject:
    topic: Sequential machine theory
  subject:
    topic: Application-specific integrated circuits
  classification: TK7868.L6 L44 2006
  classification: 621.39/2
  identifier: 0534551610
  identifier: 2005921008
  record info:
    record content source: TEF
    record creation date: 050425
    record change date: 20151101180624.0
    record identifier: in00002055416