rdf-syntax-grammar
mods:
  schema location: http://www.loc.gov/mods/v3 http://www.loc.gov/standards/mods/v3/mods-3-2.xsd
  title info:
    title: Designing digital computer systems with Verilog
  name:
    name part: Lilja, David J.
    role:
      role term: creator
  name:
    name part: Sapatnekar, Sachin S.
    name part: 1967-
  type of resource: text
  genre: bibliography
  origin info:
    place:
      place term: enk
    date issued: 2005
    issuance: monographic
  language:
    language term: eng
  physical description:
    form: print
    extent: ix, 160 pages : illustrations ; 26 cm.
  note: David J. Lilja and Sachin S. Sapatnekar.
  note: Includes bibliographical references and index.
  subject:
    topic: Verilog (Computer hardware description language)
  subject:
    topic: Electronic digital computers
    topic: Design and construction
  classification: TK7885.7 .L55 2005
  classification: 621.39/2
  identifier: 052182866X (alk. paper)
  identifier: 2004054515
  identifier: http://www.loc.gov/catdir/toc/cam051/2004054515.html
  related item:
    location:
      url: http://www.loc.gov/catdir/toc/cam051/2004054515.html
  record info:
    record content source: DLC
    record creation date: 040701
    record change date: 20151101052831.0
    record identifier: in00002037713