Verification by error modeling : using testing techniques in hardware verification /

Bibliographic Details
Main Author:	Radecka, Katarzyna
Other Authors:	Zilic, Zeljko
Format:	Book
Language:	English
Published:	Boston : Kluwer Academic Publishers, [2003]
Series:	Frontiers in electronic testing ; 25.
Subjects:	Integrated circuits > Very large scale integration > Computer-aided design. Integrated circuits > Verification. Error analysis (Mathematics)

Description
Physical Description:	xiv, 216 pages : illustrations ; 25 cm.
Bibliography:	Includes bibliographical references (pages [197]-209) and index.
ISBN:	1402076525 (alk. paper)