System-On-A-Chip verification : methodology and techniques /
System-On-a-Chip Verification: Methodology and Techniques is the first book to cover verification strategies and methodologies for SOC verification from system level verification to the design sign- off. The topics covered include Introduction to the SOC design and verification aspects, System level...
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| Format: | eBook |
| Language: | English |
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New York :
Kluwer Academic Publishers,
[2002]
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| Online Access: | Connect to the full text of this electronic book Connect to the full text of this electronic book |
| Summary: | System-On-a-Chip Verification: Methodology and Techniques is the first book to cover verification strategies and methodologies for SOC verification from system level verification to the design sign- off. The topics covered include Introduction to the SOC design and verification aspects, System level verification in brief, Block level verification, Analog/mixed signal simulation, Simulation, HW/SW Co-verification, Static netlist verification, Physical verification, and Design sign-off in brief. All the verification aspects are illustrated with a single reference design for Bluetooth application. System-On-a-Chip Verification: Methodology and Techniques takes a systematic approach that covers the following aspects of verification strategy in each chapter: Explanation of the objective involved in performing verification after a given design step; Features of options available; When to use a particular option; How to select an option; and Limitations of the option. This exciting new book will be of interest to all designers and test professionals. |
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| Item Description: | Electronic resource. |
| Physical Description: | 1 online resource (xiii, 372 pages) : illustrations |
| Bibliography: | Includes bibliographical references and index. |
| ISBN: | 0306469952 9780306469954 9780792372790 0792372794 |