Practical implementation of a phase locked loop tunable filter less sensitive to process variations /

(DFQM) CAD tools, and other software tools used to implement

Bibliographic Details
Main Author: Kripalani, Ayesha
Format: Thesis eBook
Language:English
Published: [Place of publication not identified] : [publisher not identified] ; 1998.
Subjects:
Online Access:Link to OAKTrust copy
Description
Summary:(DFQM) CAD tools, and other software tools used to implement
accuracy so that they could be practically implemented at the
adopted produces improved chip performances and reduced
along the way which will be noted and discussed.
analyzed and tested to verify the model appropriateness and
at the Electrical Engineering Department, Texas A&M
Cadence's post-processing tool. 5.HSPICE[7]: HSPICE
Circuit Simulator. The application of these tools will be
demonstrated in this thesis as the optimization methodology
developed in Alexander's Thesis [1, 2], were thoroughly
Integrated Circuits (ICs) using Statistical Circuit Design
is described. Furthermore, certain assumptions will be made
its manufacturability. This will result in a system that is
methodology attempts to optimize a complex system such as a
methods to optimize the performance of circuit design in the
of Design for Quality and Manufacturability the following
of the manufacturing process. In order to achieve the goals
optimized system and nominal system were created using [3];
performances that were critical and subject to large
Phase Locked Loop based tunable filter. Once optimized, the
presence of uncontrollable variations in the manufacturing
process and in the operating conditions. The adopted
robust and less susceptible to variations in the uncertainty
specifications used in Alexander's thesis [2]. The
spectre[6]: Cadence's circuit simulator. 4.artil[6]:
steps were taken: 1.Statistical behavior models
System for Statistical Improvement of Performance, developed
system will be compared with the nominal circuit. Finally it
test circuits were designed. The systems were fabricated
this research are as follows: 1.GOSSIP[4]: A Generic
This thesis describes a strategy for designing manufacturable
transistor level. 2.The system was designed to meet the
University. 2.simvis95[5]: A utility program for
using MOSIS. The Design for Quality and Manufacturability
variability in accordance to simulations performed prior to
variations in the process were optimized. 3.Layouts of the
visualization of statistical optimization data. 3.
will be demonstrated that the optimization methodology
Item Description:"Major subject: Electrical Engineering".
Vita.
Physical Description:xiv, 170 leaves : illustrations ; 28 cm.
Also available online.
Issued also on microfiche from Lange Micrographics.
Bibliography:Includes bibliographical references: pages 114-118.