Algorithms for design for quality of integrated circuits /
(DFQ) is proposed, based on a top-down design
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| Format: | Thesis eBook |
| Language: | English |
| Published: |
[Place of publication not identified] :
[publisher not identified] ;
1995.
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| Subjects: | |
| Online Access: | Link to OAKTrust copy |
| Summary: | (DFQ) is proposed, based on a top-down design algorithms are presented, as follows: for the first algorithms for designing high quality Integrated Also, it allows designers to study the influence of approach introduces, for the first time, a DFQ-based approach to system level Statistical Design for Quality approach. 3.Yield maximization using the Monte Carlo area, a new general IC quality measure is proposed, before. It takes into consideration the correlations between circuit parameters as well as the blocks and/or block parameters are critical, early in Circuits (ICs). The following three major areas of contrast to the commonly used bottom-up DFQ approach. described and results are presented. For yield Design for Quality are studied: 1. Quality Measures and formalization of specification propagation down the functions yi, and the scaled departures of yi from gradient is introduced for the cases not considered implementation, using an MOSFET-C bandpass filter, is information on the functional block level, which is in level design. It focuses maximum effort on "trouble maximization using the Monte Carlo simulations, an method. In these areas, new methodologies, measures and methodology. The methodology uses statistical on CplCpk indices. For the Top-Down design, a new optimal assignment of statistical. functional block original new formula for the estimation of the yield parameter tolerances using the Top-Down design performance, and can be used with little statistical proportionality of parameter standard deviations with respect to the corresponding nominal values. shown to be more suitable for "on-target" design with specification propagation techniques which allow specifications based on cost and quality criteria. This spots" and areas of design which optimize system system hierarchy, thus introducing DFQ to the system the design phase. An initial successful The main thesis objective is to develop new, efficient the system performance and quality, and shows which their applications. 2.Optimum assignment of circuit their target values. In a practical example, it is utilizing scaled standard deviations of IC performance variability reduction than the previous measures based various types of interand intra- block correlations on |
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| Item Description: | "Major subject: Electrical Engineering". Vita. |
| Physical Description: | xii, 133 leaves : illustrations ; 28 cm. Also available online. Issued also on microfiche from Lange Micrographics. |
| Bibliography: | Includes bibliographical references. |