rdf-syntax-grammar
mods:
  schema location: http://www.loc.gov/mods/v3 http://www.loc.gov/standards/mods/v3/mods-3-2.xsd
  title info:
    title: Design and analysis of instruction issue logic for hyperscaler processors
  name:
    name part: Kalyanasundharam, Vydhyanathan.
    role:
      role term: creator
  type of resource: text
  genre: bibliography
  origin info:
    place:
      place term: xx
    date issued: 1995
    issuance: monographic
  language:
    language term: eng
  physical description:
    form: print
    form: remote
    extent: x, 70 leaves : illustrations ; 28 cm.
  abstract: A dynamic instruction scheduling mechanism developed is
  abstract: another hyperscalar scheduling mechanism is estimated. The
  abstract: between the processor throughput and resource utilization.
  abstract: cost-performance ratio of the two schemes are analyzed.
  abstract: dependencies by dynamically assigning a tag during
  abstract: Destination registers are renamed to avoid anti and output
  abstract: evaluate the scheme is presented. The model is capable of
  abstract: fetched in to a central window to improve the processor
  abstract: handling variable number of threads, functional units, window
  abstract: instruction decode. Instructions from multiple streams are
  abstract: instructions fetched. The cost of the proposed scheme and
  abstract: presented. The proposed mechanism works out a compromise
  abstract: processor throughput and resource utilization when the
  abstract: proposed scheme is used.
  abstract: Simulation results show a substantial increase in the
  abstract: sizes, operand buses, write ports and the number of
  abstract: The scheduling mechanism issues instructions out of order.
  abstract: throughput. A hyperscalar processor model developed to
  note: by Vydhyanathan Kalyanasundharam.
  note: "Major subject: Electrical Engineering".
  note: Vita.
  note: Also available online.
  note: Issued also on microfiche from Lange Micrographics.
  note: M.S. Texas A&M University 1995.
  note: Includes bibliographical references.
  subject:
    topic: Major electrical engineering
  identifier: https://hdl.handle.net/1969.1/ETD-TAMU-1995-THESIS-K35
  related item:
    location:
      url: https://hdl.handle.net/1969.1/ETD-TAMU-1995-THESIS-K35
  record info:
    record content source: TXA
    record creation date: 960710
    record change date: 20220103134700.0
    record identifier: in00001311141