Design of the PSI connection processor for the Xpress transfer protocol /
7 it became clear that they would require modifications to
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| Format: | Thesis eBook |
| Language: | English |
| Published: |
[Place of publication not identified] :
[publisher not identified] ;
1994.
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| Subjects: | |
| Online Access: | Link to OAKTrust copy |
| Summary: | 7 it became clear that they would require modifications to and execution. The implementation in the Verilog Hardware are expected to be implemented in hardware. Furthermore, be implemented by a set of inexpensive VLSI circuits, this Chesson, who advised not taking the state machines too Connection Processor for the Xpress Transfer Protocol is Description Language may be used to obtain an area estimate designed. The implementation is based on the finite state ensure that they will behave as one must assume was ensure the integrity of the implementation, no alterations faster than clock cycles in most computers, future protocols Historically, data communication protocols have been implementation. The product of the decomposition and implemented in software; however, with transmission rates intended. This view was supported by discussions with Greg literally, but rather use them mainly as a guide for machines in revision 3.4. While reviewing the state machines of the Connection Processor. partitioning process of the XTP protocol is a reflection of processing in a host computer. If protocol processing can protocol processing can become a substantial part of all the characteristics of the protocol. The modifications were therefore limited to changes within each state machine. To were conducted that substantially effects their interaction would reduce the total system cost. In this thesis, the PSi |
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| Item Description: | "Major subject: Electrical Engineering". Vita. |
| Physical Description: | ix, 132 leaves : illustrations ; 28 cm. Also available online. |
| Bibliography: | Includes bibliographical references. |