APA (7th ed.) Citation

Kumar, S. (1994). An instruction issue mechanism for superscalar processors supporting multiple threads. [publisher not identified].

Chicago Style (17th ed.) Citation

Kumar, Salil. An Instruction Issue Mechanism for Superscalar Processors Supporting Multiple Threads. [Place of publication not identified]: [publisher not identified], 1994.

MLA (9th ed.) Citation

Kumar, Salil. An Instruction Issue Mechanism for Superscalar Processors Supporting Multiple Threads. [publisher not identified], 1994.