Design and simulation of an FPGA architecture /
applications(RBFD). Static RAM programming technology is
| Main Author: | |
|---|---|
| Format: | Thesis eBook |
| Language: | English |
| Published: |
[Place of publication not identified] :
[publisher not identified] ;
1994.
|
| Subjects: | |
| Online Access: | Link to OAKTrust copy |
| Summary: | applications(RBFD). Static RAM programming technology is architectures. As a revolutionary idea in semicustom better speed performance and less area cost than general BICMOS technologies. Evaluation of this architecture is made by mapping DSP logic functions, the RBFD demonstrates a chapters of this thesis. The utilization of Digital Signal commercially available FPGA chips and the FPGA architectures currently under investigation are summarized in the first two employed in the RBFD to provide the in-circuit re- FPGA architecture for DSP applications is proposed in this FPGAs are not efficient for DSP applications where only a integrated circuits, FPGAs can provide very low prototype and manufacturing costs. The main features of most of the of application specific Field Programmable Cate Array (FPGA) Processing(DSP) is increasing in many areas. General purpose programmability. The RBFD is implemented with CMOS and purpose FPGAs for DSP applications. The speed is increased small class of logic functions are frequently used. A new the Triptych FPGA and Xilinx 3000. thesis. This architecture is called RAM-Based FPGA for DSP This thesis investigates the design and simulation problems up to 69% with two to five times less area cost compared with |
|---|---|
| Item Description: | "Major subject: Electrical Engineering". Vita. |
| Physical Description: | ix, 79 leaves : illustrations ; 28 cm. Also available online. |
| Bibliography: | Includes bibliographical references. |