http://www.loc.gov/mods/v3 http://www.loc.gov/standards/mods/v3/mods-3-2.xsd
hardware-based approach to adaptive load-sharing on a local area network
a way that no machine is idle when runnable tasks are queued
balancing, Lightly-loaded, Heavily-loaded, Verilog HDL, and
chip also aids a heavily-loaded processor in speeding up the
comparing 256 16-bit load vectors has been developed and
contending to migrate a process to the same lightly-loaded
design was verified with extensive simulations. Keywords:
distributed systems. Two types of load-distribution
find a new partner. A new hard-wired comparator for
hardware level and thus by shifting the process of finding a
in which the total load on the system is distributed in such
lightly-loaded node to the physical layer (hardware), a more
load on the entire system. Most existing load-distributing
Load-distribution is used to enhance the performance of
Local Area Networks, Load-info packets, Load-sharing, Load-
model for the load-sharing chip has been developed and the
node. The nodes which experience a collision can retreat and
process of finding a lightly-loaded partner on the network.
proposed here uses the broadcast nature of the Ethernet
protocol to communicate with all the nodes on the network
reduces the overhead of packet processing on the CPU. This
schemes communicate with a single node at a time. The scheme
simulated using the Hspice circuit simulator. The
simulations showed a good delay performance. A Verilog HDL
simultaneously. A load-sharing chip is proposed which
system, and load-balancing schemes, which try to equalize the
techniques have been studied and used: load-sharing schemes,
The collisions on the Ethernet can be easily detected at the
This is particularly useful when two or more nodes are
up for execution at another machine in the distributed
updated system state can be used for migrating the processes.
"Major subject: Electrical Engineering".