Statistical error analysis for digital recursive filters /
| Main Author: | |
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| Other Authors: | , , , |
| Format: | Thesis Book |
| Language: | English |
| Published: |
1993.
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| Subjects: | |
| Online Access: | Link to OAKTrust copy http://proxy.library.tamu.edu/login?url=http://proquest.umi.com/pqdweb?did=747728941&sid=1&Fmt=2&clientId=2945&RQT=309&VName=PQD |
| Abstract: | The study of arithmetic roundoff error has attracted many researchers to investigate how the signal-to-noise ratio (SNR) is affected by algorithmic param eters, especially since the VLSI (Very Large Scale Integrated circuits) technologies have become more promising for digital signal processing. Typically, digital signal processing involving, either with or without m atrix inversion, will have tradeoffs on speed and processor cost. Hence, the problems of an area-time efficient m atrix com putation and roundoff error behavior analysis will play an im portant role in this dissertation. A newly developed non-Cholesky square-root m atrix will be discussed which precludes the arithm etic roundoff error over some interesting operations, such as complex-valued matrix inversion with its SNR analysis and error propagation effects. A non-CORDIC parallelism approach for complex-valued m atrix will be presented to upgrade speed at the cost of moderate increase of processor. The lattice filter will also be looked into, in such a way, th at one can understand the SNR behavior under the conditions of different inputs in the joint process system. Pipelining technique will be dem onstrated to manifest the possibility of high-speed non-matrix-inversion lattice filter. Floating point arithm etic modelings used in this study have been focused on effective methodologies that have been proved to be reliable and feasible. W ith the models in hand, we study the roundoff error behavior based on some statistical assumptions. Results are dem onstrated by carrying out simulation to show the feasibility of SNR analysis. We will observe th a t non-Cholesky square-root m atrix has advantage of saving a time of 0 ( n 3) as well as a reduced realization cost. It will be apparent th a t for a Kalman filter the register size is increasing significantly, if pole of the system m atrix is moving closer to the edge of the unit circle. By comparing roundoff error effect due to floating-point and fixed-point arithm etics, we can see th a t floating-point arithm etic is less sensitive to maxim um /m inim um value of a m atrix. Implementation of parallelism on complex-valued m atrix can be justified in the sense of simpler hardware and higher speed. It will be illustrated th a t the more correlated inputs are present in the lattice filter, the SNR of the order-recursive filter will be degraded faster. Pipelining technique will be proved to be effective in speed upgradation, especially for the order-recursive lattice filter whose order is usually very high. |
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| Item Description: | Vita. "Major subject: Electrical Engineering." |
| Physical Description: | xii, 135 leaves : illustrations ; 28 cm |
| Bibliography: | Includes bibliographical references. |