APA (7th ed.) Citation

Shiau, Y., Halverson, D., Lu, M., & Yen, J. (1992). Timing analysis of VLSI circuits using symbolic and visualization technics for practical applications.

Chicago Style (17th ed.) Citation

Shiau, Yan-Chyuan, Don Halverson, Mi Lu, and John Yen. Timing Analysis of VLSI Circuits Using Symbolic and Visualization Technics for Practical Applications. 1992.

MLA (9th ed.) Citation

Shiau, Yan-Chyuan, et al. Timing Analysis of VLSI Circuits Using Symbolic and Visualization Technics for Practical Applications. 1992.

Warning: These citations may not always be 100% accurate.