An Intel 8080 microprocessor implementation of a navigation algorithm for the low-cost GPS receiver /

Bibliographic Details
Main Author:	Suraratrungsi, Songsuk
Other Authors:	Guseman, L. F. (degree committee member.), Howze, J. W. (degree committee member.), Rhyne, V. T. (degree committee member.)
Format:	Thesis Book
Language:	English
Published:	[College Station, Tex.] : Suraratrungsi, 1977.
Subjects:	Artificial satellites in navigation. Microprocessors. Major electrical engineering. Academic theses.
Online Access:	Link to ProQuest copy. Link to OAKTrust copy

Description
Abstract:	The feasibility of a microprocessor implementation as a part of a low-cost GPS receiver is described. A noisy model is considered in the dynamic system simulation consisting of a C5A flight from California to Hawaii with the GPS satellite pseudo-range inputs. A total of 726 fixes are taken during a 6-hour flight with an RMS error of 31*59 ft. and a fix rate of 30 s/fix. A complete 32 bit floating point math package was developed for the Intel 8080 microprocessor in order to implement the navigation algorithm.
Item Description:	"Major subject: Electrical Engineering." Vita.
Physical Description:	vii, 52 leaves : illustrations, graphs ; 28 cm
Bibliography:	Includes bibliographical references (leaf 51).