rdf-syntax-grammar
mods:
  schema location: http://www.loc.gov/mods/v3 http://www.loc.gov/standards/mods/v3/mods-3-2.xsd
  title info:
    title: Simulated annealing for VLSI design
  name:
    name part: Wong, D. F.
    role:
      role term: creator
  name:
    name part: Leong, Hon Wai
    name part: 1955-
  name:
    name part: Liu, C. L. (Chung Laung)
    name part: 1934-
  type of resource: text
  genre: bibliography
  origin info:
    place:
      place term: mau
    date issued: 1988
    issuance: monographic
  language:
    language term: eng
  physical description:
    form: print
    extent: vii, 202 pages : illustrations
  note: by D.F. Wong, H.W. Leong, C.L. Liu.
  note: Includes index.
  note: Bibliography: pages [185]-197.
  subject:
    topic: Integrated circuits
    topic: Very large scale integration
    topic: Design and construction
    topic: Data processing
  subject:
    topic: Annealing of metals
    topic: Mathematical models
  classification: TK7874 .W65 1988
  classification: 621.381/73
  related item:
    title info:
      title: Kluwer international series in engineering and computer science ; SECS 42
  identifier: 0898382564 :
  identifier: 87029306
  record info:
    record content source: DLC
    record creation date: 870928
    record change date: 20151007054619.0
    record identifier: in00000027778